This invention relates to a matrix display device comprising a row and column array of picture elements connected to sets of row and column address conductors via which switching signals and serial multi-bit digital data signals respectively from a drive circuit are applied to the picture elements, and in which each picture element comprises a serial charge redistribution digital to analogue converter circuit having two switching transistors and two capacitor elements, at least one of which comprises an electro-optic display element, for converting a multi-bit digital data signal on a respective one of the column address conductors during a picture element address period to an analogue voltage for the display element, the switching transistors of the picture element being operable in sequence during the picture element address period by said switching signals.
A matrix display device of the above kind, and more particularly a liquid crystal matrix display device, is described in EP-A-0597536, to which U.S. Pat. No. 5,448,248 corresponds. The display device has a number of advantages over conventional kinds of matrix display devices in which data signals supplied by a column drive circuit via the column address conductors to the picture elements comprise analogue voltage signals, especially when the video signal supplied to the display is a digital video signal. The need to convert the digital picture information signals to analogue (amplitude modulated) signals before being applied to the column address conductors is removed. The column drive circuit can readily be implemented using purely digital circuitry thereby making it capable of operating at comparatively high speeds and of being conveniently integrated on a substrate of the display panel using thin film transistors, TFTs. The switching transistors of the picture elements comprise TFTs of one conductivity type and can be of the same kind as those used in the drive circuit and fabricated simultaneously therewith. In one embodiment, the two capacitor elements of a picture element are each constituted by a display sub-element obtained by dividing a display element into two discrete parts.
The serial charge redistribution digital to analogue circuits of the picture elements are operated in picture element address periods by turning on a first of the two TFTs, by means of a switching signal, so as to charge a first of the capacitor elements according to the first bit of the serial multi-bit data signal then present on the associated column conductor. The TFT is then turned off, by removing the switching signal, and the second TFT turned on, by means of a further switching signal, so that the charge on the one capacitor element is shared between the two capacitor elements. This TFT is then turned off and the first TFT turned on again so as to charge the one capacitor element according to the second bit of the multi-bit data signal then on the column conductor, following which the first TFT is turned off and the second TFT turned on so as to allow again charge sharing between the two capacitor elements. The cycle is repeated for all bits of the data signal such that, after the final operation of the second TFT a voltage level is obtained on the capacitor elements according to the multi-bit data signal. In order to sequentially operate the TFTs in this manner, the two TFTs of a picture element are connected respectively to two different row address conductors via which their respective switching signals are supplied from the drive circuit. The two row address conductors are shared by all the other picture elements in the same row. Each row address conductor, apart from the first and the last, is shared between two adjacent rows of picture elements with the corresponding first TFTs of the picture elements in one row being connected to one row address conductor and the corresponding second TFTs of the picture elements in an adjacent row of picture elements being connected to the same row address conductor. The sharing of row address conductors between adjacent rows of picture elements avoids the need to provide respective pairs of row address conductors for each row of picture elements, in effect doubling the number of row address conductors required, which would be undesirable, particularly if the device is used in a projection system, as the density of the picture elements and aperture of the display elements would be compromised by the presence of such additional row address conductors. However, the sharing of the row address conductors can impose limitations in operation which cause problems in certain circumstances in that the order in which the rows of picture elements can be driven, i.e. the vertical scan direction, is constrained.